The invention is generally related to timing analysis of logic models, e.g., for integrated circuit designs and the like. In particular, the invention is related to accessing and manipulating timing data generated by a timing analysis engine or program.
Electronic circuits have become significantly more complex as circuit fabrication technologies have improved. It is not uncommon for electronic circuits to incorporate multiple integrated circuits, or chips, packaged together on printed circuit boards and/or advanced packages, and interconnected by hundreds of signal paths. Furthermore, each integrated circuit may literally include millions of logic gates and interconnects integrated onto a single piece of silicon substrate the size of a fingernail. In addition, often the same functionality that required multiple chips can be integrated onto the same chip, a concept often referred to as xe2x80x9csystem-on-chipxe2x80x9d technology.
The design of electronic circuits has likewise become more difficult as complexity has increased. Complex circuits, for example, are often designed by teams of designers. Different designers are typically given responsibility to design different functional blocks of a circuit, with the final design incorporating the functional blocks into a single integrated design. Testing of such circuit designs is also an important aspect of the design process, since each functional block often must be tested separately to insure correct functional operation, as well as collectively with the other functional blocks to ensure correct functional operation of the overall design.
Various computer software applications, commonly known as xe2x80x9ctoolsxe2x80x9d, have been developed to assist in the design of electronic circuits. One such tool is a timing analysis program, or xe2x80x9cenginexe2x80x9d, which is used to calculate expected delays along signal paths in a circuit design to assist in identifying timing problems such as race conditions or early or late arrival of signals relative to other signals. A timing analysis program is typically a stand-alone application that is accessible by a single user, and that typically operates on a logical model of a circuit design, incorporating netlists of components and interconnections, to determine the amount of delay through different paths in a circuit design. Further, a number of timing analysis programs are provided with interactive capabilities such that a user is able to interactively modify timing parameters and options, request other timing data, modify report formats, etc. while performing timing analysis on a logic design.
Given the complexity of modem circuit designs, timing analysis presents a number of obstacles to the design process. For example, for complex designs, the amount of timing data generated by a timing analysis program is often beyond the capabilities of a conventional desktop computer or workstation, both in terms of storage requirements and processing power, such that a large multi-user computer such as a server is required to run a timing analysis program on a complex design. Even when run on a high performance computer, timing analysis of a complex circuit may take several hours, and generate hundreds of megabytes of data. For these reasons, often a timing analysis program is run in a non-interactive batch job overnight to minimize disruptions and reduced computer performance during the day.
Moreover, when a circuit design is being developed by a team of designers, it may be desirable for multiple designers to access the same timing data, so that the different designers can test different parts of the design and thus collaborate in the overall timing verification of the design. Traditionally, however, access to timing data generated by a timing analysis program is limited to one user at a time. Multiple users may instead run separate timing analysis programs on different computers to concurrently access timing data, but doing so requires multiple high performance computers, which is an inefficient allocation of computer resources, and may be beyond the resources of many enterprises.
As discussed above, timing analysis may be performed in a batch job to generate a large, omnibus report. In some instances, multiple users may be permitted to access the resulting report at the same time. However, when a designer is only interested in working with a small portion of a design, the vast majority of information in an omnibus report is irrelevant, which makes it difficult to sort through the report to find the information of interest. Furthermore, the size of an omnibus report often exceeds the capacities of many editors used on single-user computers. In addition, often to keep the size of an omnibus report manageable, some paths in the circuit design may not be analyzed, and often a designer will need timing data for some of these unanalyzed paths. As a result, additional timing analysis is often required after analysis of an omnibus report.
Another difficulty presented by batch processing of a circuit design is the lack of interactivity for users. A report, once generated, only provides timing data for a specific set of circumstances set forth by a designer when setting up the timing analysis program to perform timing analysis. Other designers may require other timing data, or may require different timing parameters to be used when generating the data. Changes to parameters and other options typically require new data to be generated. As a result, modifying timing analysis parameters, fixing errors, etc., becomes a time consuming and cumbersome process.
A significant need has therefore developed in the art for a manner of facilitating the performance of timing analysis on complex circuit designs, and in particular, to facilitate collaborative timing analysis of such circuit designs by multiple circuit designers.
The invention addresses these and other problems associated with the prior art by providing an apparatus, program product and method in which an interactive request server program is utilized to interface a plurality of client computers with a timing analysis program. The interactive request server program receives client requests from the plurality of client computers over a network, and, in response to each client request, accesses the timing analysis program to retrieve timing data based upon such client request and thereafter forwards the timing data to the client computer making such request. By using the interactive request server program as an interface to the timing analysis program, interactive timing analysis, and if desired, collaborative timing analysis, may be performed on a logic model by multiple clients or users, and often with less computer resources than would otherwise be required.
In some embodiments of the invention, the interactive request server program may be implemented using a web server program and an application server program, with the web server program interfacing with the client computers via an Internet-type interface, and the application server program interfacing with the timing analysis program using a programmatic interface supported by the timing analysis program. The web server program and the application server program interface with one another through the use of scripts, which are executed by the web server in response to client requests, and which generate one or more commands that are issued to the application server program to control the timing analysis program via the programmatic interface. Through the use of an Internet-type interface, clients operating on a wide variety of platforms, and interfaced over a wide variety of networks, may be supported with less difficulty, and often with commercially-available client software (e.g., a conventional web browser). However, it will be appreciated by one of ordinary skill in the art having the benefit of the instant disclosure that other implementations of an interactive request server program may be used in the alternative, and the invention is therefore not limited to an Internet-type interface.